| Property | Value |
|---|---|
| Build identifier | yy3568 |
| SoC | RK3568 |
| Model | Youyeetoo YY3568 |
| Compatible | youyeetoo,yy3568, rockchip,rk3568 |
| DDR loader | rk3568_ddr_1560MHz_v1.25.bin |
| UART | UART2 M0, 1,500,000 baud, 8N1 |
| User LEDs | GPIO3_A4 and GPIO2_B2, active high |
| USB host power | GPIO0_D6 vcc5v0_host, active high |
| PCIe clock-buffer enable | GPIO3_A7 PCIECLKIC_OE_H, active low |
| Bare-metal USB host | OHCI0 and OHCI1 |
| Chainloader backend | pinned mainline U-Boot v2026.07 FIT |
| BL33 load / stack limit | 0x00800000 / 0x03f00000 |
| First-stage media | MaskROM USB, SD, eMMC user area, SPI NOR |
The vendor and ArmBoardBringUp trees disagree about the separate OTG VBUS
GPIO (GPIO0_A5 versus GPIO0_B7). Both describe the supported OHCI host
connectors through GPIO0_D6, so the bare-metal descriptor drives only that
common rail and leaves the out-of-scope OTG rail untouched.
The wiring was cross-checked against the vendor U-Boot and kernel DTS material
under Rockchip-Library/RK356x/YY3568. ArmBoardBringUp is a provenance and
wiring reference, not a second board identity or build target.
yy3568.bin: normal firmware base requiring an appended FUEFI payload.demo_yy3568.bin: normal firmware plus the example payload.yy3568.img: RKNS v2 SD delivery image for the firmware-only base.demo_yy3568.img: standalone RKNS v2 SD demonstration image.make usb BOARD=yy3568
make demo_yy3568.img
make maskrom3568 # SoC-wide optional xrock USB-plug flow
The manifest pins official U-Boot v2026.07 commit
ece349ade2973e220f524ce59e59711cc919263f, the mainline YY3568 overlay,
Rockchip BL31 v1.46, board-specific addresses, media IDs, and automatic boot
targets. The board files follow Armbian commit
a710f6715cc06fc90dfdd69fb93d642c52f3a3b8. This variant does not modify
yy3568.bin or demo_yy3568.bin.
The PCIe 3.0 PHY stays in its default aggregate x2 mode. The NVMe rail uses
GPIO3_C3 and the external PCIe clock-buffer enable uses GPIO3_A7 active-low,
as specified by the manufacturer’s YY3568 storage
documentation. Declaring that
clock enable active-high disables the PHY reference clock and causes the
characteristic lock failed 0x6890000 timeout before NVMe enumeration.
The pinned v2026.07 tree also receives the upstream Rockchip PCIe fixes that
enable controller clocks before PHY initialization and remove the associated
double-disable cleanup paths. Both board power polarity and driver sequencing
are therefore established before the PHY attempts PLL lock.
make chainload BOARD=yy3568
make chainload-check BOARD=yy3568
make chainload-media BOARD=yy3568 MEDIA=sd-nvme
make usb-chainload BOARD=yy3568
After its three-second UART interruption window, U-Boot searches removable SD
(mmc1), NVMe, eMMC (mmc0), SCSI, USB mass storage, PXE, and DHCP in that
order. Onboard mmc2 SDIO/Wi-Fi is never treated as removable storage. SPI
commands remain interactive; SPI NOR can supply the first stage but is not an
automatic OS target.
The same build also creates uboot_yy3568_sd_nvme.img, a firmware-only SD
bootstrap image with U-Boot’s complete u-boot-rockchip.bin binman output at
LBA 64. It boots through the mainline TPL/SPL path, using the pinned DDR loader,
BL31, board DTS, PCIe x2 setup, and mainline U-Boot commit. Its default command
is exactly bootflow scan -lb nvme. Extlinux, boot.scr, and the ARM64
removable-path EFI loader remain enabled. If NVMe is absent or has no valid
bootflow, U-Boot returns to its prompt without automatically trying the SD
card, eMMC, SCSI, USB, PXE, or DHCP.
Read the common chainloading and guarded installation guide
before writing persistent media, and follow the visual SPI-NOR
tutorial for SPI. The exact confirmation must use yy3568,
and a backup from another board is rejected.
See common bare-metal behavior for payload handoff, memory, HDMI, input, and reset semantics.